Modern microprocessors and graphics processors consume dynamic power by performing computations and by moving data. The movement of data involves driving on-chip interconnects, which are typically relatively long wires combined with repeaters to linearize wire delay. Interconnect power consumption is also due to the capacitive effects of voltage transitions on neighboring wires. As processors scale upward in size, interconnect lengths trend upward as well.
Data is sent from on-die transmitters to on-die receivers by way of the on-chip interconnects. Attendant clock signals are sent in parallel with the data, particularly for high speed serial pathways. Conventional receivers use the clock signals to phase adjust, as necessary, and synchronize the plural incoming data streams. In some conventional designs, multiple clock phases are transmitted. These often exhibit capacitive loading and resulting delays and power consumption.